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lt3748 3748f features a pplications description 100v isolated flyback controller the lt ? 3748 is a switching regulator controller specifically designed for the isolated flyback topology and capable of high power. it drives a low side external n-channel power mosfet from an internally regulated 7v supply. no third winding or opto-isolator is required for regulation as the part senses the isolated output voltage directly from the primary-side flyback waveform. the lt3748 utilizes boundary mode to provide a small magnetic solution without compromising load regulation. operating frequency is set by load current and transformer magnetizing inductance. the gate drive of the lt3748 combined with a suitable external mosfet allow it to deliver load power up to several tens of watts from input voltages as high as 100v. the lt3748 is available in a high voltage 16-lead msop package with four leads removed. 25w, 12v output, isolated telecom supply n 5v to 100v input voltage range n 1.9a average gate drive source and sink current n boundary mode operation n no transformer third winding or opto-isolator required for regulation n primary-side winding feedback load regulation n v out set with two external resistors n intv cc pin for control of gate driver voltage n programmable soft start n programmable undervoltage lockout n available in msop package n isolated telecom converters n high power automotive supplies n isolated industrial power supplies output load and line regulation t ypical a pplication l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5438499 and 7471522. en/uvlo tc ss r fb r ref v c gnd intv cc lt3748 3748 ta01a 56.2k 2nf v in 36v to 72v v out + 12v 2a v out ? v in 4:1 412k 15.4k 10 f 3.8 h 60.8 h 100 f gate sense 4700pf 4.7 f 6.04k 243k 0.033 10k load current (a) 0 11.4 v out (v) 11.6 11.8 12.0 12.2 14.4 12.6 0.5 1.0 1.5 2.0 3748 ta01b v in = 72v v in = 48v v in = 36v
lt3748 3748f a bsolute maxi m u m r atings v in , r fb ...................................................................100v v in to r fb ..................................................................5v en/uvlo ......................................................C0.3v, 100v intv cc ....................................................v in + 0.3v, 20v ss, v c , tc, r ref .........................................................6v sense ......................................................................0.4v maximum junction temperature .......................... 125c operating junction temperature range (note 2) .................................................. C40c to 125c storage temperature range .................. C65c to 150c or d er in f or m ation e lectrical c haracteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 10v, unless otherwise noted. lead free finish tape and reel part marking* package description temperature range lt3748ems#pbf lt3748ems#trpbf 3748 16-lead plastic msop C 40c to 125c lt3748ims#pbf lt3748ims#trpbf 3748 16-lead plastic msop C 40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ parameter conditions min typ max units input voltage range l 5 100 v quiescent current not switching v en/uvlo = 0.2v 1.3 0 1.75 1 ma a v in quiescent current, intv cc overdriven v intvcc = 10v 300 450 a intv cc voltage range l 4.5 20 v intv cc pin regulation voltage 6.8 7 7.2 v intv cc dropout (v in C v intvcc ), i intvcc = 10ma, v in = 5v 0.7 v intv cc undervoltage lockout falling threshold l 3.45 3.6 3.75 v en/uvlo pin threshold en/uvlo pin voltage rising l 1.19 1.223 1.25 v en/uvlo pin hysteresis current en/uvlo = 1v 1.9 2.4 2.9 a soft-start current v ss = 0.4v (note 3) 5 a soft-start threshold 0.65 v soft-start reset current 3 ma maximum sense current limit threshold v c = 2.2v l 95 90 100 100 105 110 mv mv minimum sense current limit threshold v c = 0v 15 mv maximum to minimum sense threshold ratio l 5.2 6.6 8.2 mv/mv (note 1) p in c on f iguration 1 3 5 6 7 8 v in en/uvlo intv cc gate sense gnd 16 14 12 11 10 9 r fb r ref tc v c ss gnd top view ms package 16 (12)-lead plastic msop t jmax = 125c, ja = 90c/w
lt3748 3748f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3748e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design characterization and correlation with statistical process controls. the lt3748i is guaranteed over the full C40c to 125c operating junction temperature range. note 3: current flows out of the pin. parameter conditions min typ max units sense overcurrent threshold v c = 2.2v 115 130 145 mv sense input bias current v sense = 10mv (note 3) 10 15 20 a r ref voltage v c = 1.1v l 1.20 1.195 1.223 1.24 1.245 v v r ref voltage line regulation 5v < v in < 100v 0.005 0.025 %/v r ref pin bias current (note 3) l 35 500 na tc current into r ref r tc = 20k 27.5 a error amplifier voltage gain 115 v/ v error amplifier transconductance ?i = 10a 155 mhos v c source current v c = 1.1v, v rref = 0.5v C45 a v c sink current v c = 1.1v, v rref = 2v 48 a flyback comparator trip current current into r fb pin, r ref = 6.04k 10 a minimum gate off-time 700 ns minimum gate on-time 250 ns maximum discontinuous off-time v c = 0v 24 s maximum gate off-time v rref = 0.5v 55 s maximum gate on-time v sense = 0v 55 s gate output rise time c l = 3300pf, 10% to 90% 16 ns gate output fall time c l = 3300pf, 10% to 90% 16 ns gate output low (v ol ) 0.05 v gate output high (v oh ) v intvcc C 0.05 v e lectrical c haracteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 10v, unless otherwise noted.
lt3748 3748f t ypical p er f or m ance c haracteristics intv cc undervoltage lockout vs temperature intv cc voltage vs v in voltage intv cc regulator dropout vs intv cc current soft-start current vs temperature output regulation vs temperature quiescent current vs temperature intv cc voltage vs temperature t a = 25c, unless otherwise noted. quiescent current vs v in voltage intv cc dropout vs temperature temperature (oc) ?50 14.4 v out (v) 14.6 14.8 15.0 15.2 0 50 100 150 3748 g01 15.4 15.6 ?25 25 75 125 figure 15 circuit i out = 150ma on each output v in = 12v temperature (c) ?50 quiescent current (ma) 1.3 1.4 1.5 150 3748 g02 1.2 1.1 0.8 0 50 100 ?25 25 75 125 1.0 0.9 1.7 1.6 v ss = 0v intv cc = open v in = 72v v in = 36v v in = 12v v in = 6v v in (v) 0 quiescent current (ma) 0.6 0.8 1.0 60 100 3748 g03 0.4 0.2 0 20 40 80 1.2 1.4 1.6 v ss = 0v intv cc = open temperature (c) ?50 6.5 intv cc voltage (v) 6.6 6.8 6.9 7.0 7.5 7.2 0 50 75 3748 g04 6.7 7.3 7.4 7.1 ?25 25 100 125 150 i intvcc = 0ma i intvcc = 10ma v in voltage (v) 4 6 v intvcc (v) 6.0 6.5 7.0 60 3748 g05 5.5 5.0 8 20 80 10 40 100 4.5 4.0 7.5 i intvcc = 0ma i intvcc = 10ma temperature (c) ?50 intv cc uvlo (v) 3.7 3.8 3.9 25 50 75 100 125 3748 g06 3.6 3.5 ?25 0 150 3.4 3.3 4.0 rising threshold falling threshold intv cc current (ma) 0 0 intv cc regulator dropout (v) 0.5 1.0 1.5 2.0 2.5 3.0 v in = 5v 10 20 30 40 3748 g07 150c 100c 25c ?50c temperature (oc) ?50 0 intv cc dropout (v) 0.5 1.0 1.5 2.0 0 50 100 150 3748 g08 2.5 3.0 ?25 25 75 125 v in = 5v i intvcc = 20ma i intvcc = 10ma i intvcc = 5ma temperature (oc) ?50 0 soft-start current (a) 1 2 3 4 0 50 100 150 3748 g09 5 6 ?25 25 75 125
lt3748 3748f t ypical p er f or m ance c haracteristics error amplifier transconductance vs temperature error amplifier output current vs r ref pin voltage sense pin threshold vs temperature en/uvlo current vs temperature en/uvlo threshold vs temperature tc pin voltage vs temperature t a = 25c, unless otherwise noted. maximum discontinuous off-time vs temperature gate rise and fall time vs charge gate rise and fall time vs intv cc voltage temperature (c) ?50 0 en/uvlo current (a) 0.5 1.0 1.5 2.0 0 50 100 150 3748 g10 2.5 3.0 ?25 25 75 125 v en/uvlo = 1.1v v en/uvlo = 0.9v v en/uvlo = 1.3v temperature (c) ?50 en/uvlo threshold (v) 1.20 1.30 150 3748 g11 1.10 1.00 0 50 100 ?25 25 75 125 1.40 1.15 1.25 1.05 1.35 temperature (c) ?50 tc voltage (v) 0.5 0.6 0.7 150 3748 g12 0.4 0.3 0 0 50 100 ?25 25 75 125 0.2 0.1 0.9 0.8 temperature (c) ?50 100 transconductance (mhos) 110 130 140 150 200 170 0 50 75 3748 g13 120 180 190 160 ?25 25 100 125 150 v in = 100v v in = 6v v ref (v) 0 i vc (a) 0 20 40 60 2.0 3748 g14 ?20 ?40 ?10 10 30 50 ?30 ?50 ?60 0.5 1.0 1.5 2.5 150c 100c 25c ?50c temperature (c) ?50 sense threshold (mv) 80 120 150 3748 g15 40 0 0 50 100 ?25 25 75 125 160 60 100 20 140 overcurrent v c = 2.2v v c = 0.2v temperature (c) ?50 20 maximum discontinuous off-time (s) 21 23 24 25 30 27 0 50 75 3748 g16 22 28 29 26 ?25 25 100 125 150 total gate charge (nc) 0 0 gate rise and fall time (ns) average gate source, sink current (a) 10 20 30 40 20 40 60 80 3748 g17 100 120 50 0 0.5 1.0 1.5 2.0 rise time fall time q = c ? v v intvcc = 7v t r , t f 10% to 90% average current v intvcc (v) 0 gate rise and fall time (ns) 10 15 20 3748 g18 5 0 5 10 15 25 20 falling rising c gate = 3.3nf t r , t f 10% to 90%
lt3748 3748f p in functions v in (pin 1) input voltage. this pin supplies current to the internal start-up circuitry and is the reference voltage for the feedback circuitry connected to the r fb pin. this pin must be locally bypassed with a capacitor. en/uvlo (pin 3): enable/undervoltage lockout. a resistor divider connected to v in is tied to this pin to program the minimum input voltage at which the lt3748 will operate. at a voltage below ~0.5v, the part draws less than 1a quiescent current. when below 1.223v but above ~0.5v, the part will draw quiescent current but will not regulate the intv cc supply or power the gate drive circuitry. above 1.223v, all internal circuitry will start and the ss pin will source 5a. when en/uvlo falls below 1.223v, 2.4a is sunk from the pin to provide programmable hysteresis for undervoltage lockout. intv cc (pin 5): gate driver bias voltage. this pin supplies current to the internal gate driver circuitry of the lt3748. the intv cc pin must be locally bypassed with a capacitor. this pin may also be connected to v in if a third winding is not used and if v in 20v. if a third winding is used, the intv cc voltage should be lower than the input voltage for proper operation. gate (pin 6): n-channel mosfet gate driver output. switches between intv cc and gnd. sense (pin 7): the current sense input for the control loop. kelvin connect this pin to the positive terminal of the switch current sense resistor, r sense , in the source of the n-channel mosfet. the negative terminal of the current sense resistor should be connected to the gnd plane close to the ic. gnd (pins 8, 9): ground. ss (pin 10): soft-start pin. this pin delays start-up and clamps v c pin voltage. soft-start timing is set by the size of the external capacitor at the pin. switching starts when v ss reaches ~0.65v. v c (pin 11): compensation pin for the internal error amplifier. connect a series rc from this pin to ground to compensate the switching regulator. a 100pf capacitor in parallel helps eliminate noise. tc (pin 12): output voltage temperature compensation. connect a resistor to ground to produce a current pro- portional to absolute temperature to be sourced into the rref node. i tc = 0.55v/r tc . r ref (pin 14): input pin for the external ground-referred reference resistor. the resistor at this pin should be 6.04k, but for convenience in selecting a resistor divider ratio, the value may range from 5.76k to 6.34k. the resistor should be as close to the lt3748 as possible . r fb (pin 16): input pin for the external feedback resistor. this pin is connected to the transformer primary at the external mosfet power switch. the ratio of this resistor to the r ref resistor, times the internal bandgap reference, determines the output voltage (plus the effect of any non-unity transformer turns ratio). the average current through this resistor during the flyback period should be approximately 200a. the resistor should be as close to the lt3748 as possible .
lt3748 3748f block d iagra m master latch boundary mode detect variable delay timer intv cc c bias r1 r2 c ss r tc v out + v out ? v in tc ss v in sense v c t1 n ps :1 5a 20a c out d out c in l pri l sec r fb r ref r sense r c c c + ? internal reference and regulators current limit 50s max on timer 50s max off timer tc current r q s r s a1 error amp 100mv + ? + ? a3 + ? + ?? a4 a4 a2 2.4a gnd 8, 9 3748 bd q2 q1 1.223v 1.223v 1.223v en/uvlo r fb r ref gate nmos g m 6.04k 11 7 6 5 16 1 12 14 3 10
lt3748 3748f o peration the lt3748 is a current mode switching regulator con- troller designed specifically for the isolated flyback topol- ogy. the special problem normally encountered in such circuits is that information relating to the output voltage on the isolated secondary side of the transformer must be communicated to the primary side in order to maintain regulation. historically, this has been done with opto- isolators or extra transformer windings. opto-isolator circuits waste output power and the extra components increase the cost and physical size of the power supply. opto-isolators can also exhibit trouble due to limited dynamic response, nonlinearity, unit-to-unit variation and aging over life. circuits employing extra transformer windings also exhibit deficiencies. using an extra wind- ing adds to the transformers physical size and cost, and dynamic response is often mediocre. the lt3748 derives its information about the isolated output voltage by examining the primary-side flyback pulse waveform. in this manner, no opto-isolator nor extra transformer winding is required for regulation. the output voltage is easily programmed with two resistors. the lt3748 features a boundary mode control method, (also called critical conduction mode) where the part operates at the boundary between continuous conduc- tion mode and discontinuous conduction mode. due to the boundary control mode operation, the output voltage can be calculated from the transformer primary voltage when the secondary current is almost zero. this method improves load regulation without external resistors and capacitors. the block diagram shows an overall view of the system. many of the blocks are similar to those found in traditional switching regulators, including current comparators, inter- n a l reference and regulators, logic, timers and an n - channel mosfet gate driver. the novel sections include a special sampling error amplifier and a temperature compensation circuit. boundary mode operation boundary mode is a variable frequency, current mode switching scheme. the external n-channel mosfet turns on and the inductor current increases until it reaches the v c pin-controlled current limit. after the external mosfet is turned off, the voltage on the drain of the mosfet rises to the output voltage multiplied by the primary-to-secondary transformer turns ratio plus the input voltage. when the secondary current through the output diode falls to zero, the voltage on the drain of the mosfet falls below v in . a boundary mode detection comparator detects this event and turns the external mosfet back on. boundary mode returns the secondary current to zero every cycle, so the parasitic resistive voltage drops do not cause load regulation errors. boundary mode also allows the use of a smaller transformer compared to continu- ous conduction mode and does not exhibit subharmonic oscillation. at low output currents the lt3748 delays turning on the external mosfet and thus operates in discontinuous mode. unlike traditional flyback converters, the external mosfet has to turn on to update the output voltage information. below 0.6v on the v c pin, the current comparator level decreases to its minimum value and a variable delay timer waits to reset before turning on the external mosfet. with the addition of delay before turning the mosfet back on, the part starts to operate in discontinuous mode. the average output current is able to decrease while still allow- ing a minimum off-time for the error amplifier sampling circuitry. the typical maximum discontinuous off-time with v c equal to 0v is 24s.
lt3748 3748f pseudo-dc theory of operation the r ref and r fb resistors as depicted in the block diagram are external resistors used to program the output voltage. the lt3748 operates much the same way as traditional current mode switchers with the exception of the unique error amplifier which derives its feedback information from the flyback pulse. operation is as follows: when the nmos output switch turns off, its drain voltage rises above v in . the amplitude of this flyback pulse (i.e., the difference between it and v in ) is given as: v flbk = (v out + v f + i sec ? esr) ? n ps v f = d out forward voltage i sec = transformer secondary current esr = total impedance of secondary circuit n ps = transformer effective primary-to-secondary turns ratio the flyback voltage is converted to a current by r fb and q2. nearly all of this current flows through resistor r ref to form a ground-referred voltage. this voltage is fed into the flyback error amplifier. the flyback error amplifier samples this output voltage information when the secondary-side winding current reaches zero. the error amplifier uses a bandgap voltage, 1.223v, as the reference voltage. the relatively high gain in the overall loop will then cause the voltage at the r ref resistor to be nearly equal to the bandgap reference voltage, v bg . the relationship between v flbk and v bg may then be expressed as: v r v r or v v r r flbk fb bg ref flbk bg fb ref ? ? ? ? ? ? = = ? ? ? ? ? ?? v bg = internal bandgap reference combining with the previous v flbk expression yields an expression for v out , in terms of the internal reference, programming resistors, transformer turns ratio and diode forward voltage drop: v v r r n v i esr out bg fb ref ps f sec = ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 ( ) additionally, it includes the effect of nonzero secondary output impedance (esr). this term can be assumed to be zero in boundary control mode. temperature compensation the first term in the v out equation does not have a tem- perature dependence, but the diode forward drop, v f , has a significant negative temperature coefficient. to compensate for this, a positive temperature coefficient current source is internally connected to the r ref pin. the current is set by resistor r tc to ground connected between the tc pin and ground. to cancel the temperature coefficient, the following equation is used: d d d d d v t r r n v t or r r n v f fb tc ps tc tc fb ps = ? = ? ? ? , ? 1 1 ff tc fb ps t v t r n / ? d d d (dv f / d t ) = diodes forward voltage temperature coef- ficient (dv tc / d t ) = 1.85mv/c v tc = 0.55v the resistor value given by this equation should also be verified experimentally and adjusted, if necessary, to achieve optimal regulation over temperature. the revised output voltage is as follows: v v r r n v v r out bg fb ref ps f tc tc = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 ?? ? ( ) r n i esr fb ps sec a pplications i n f or m ation
lt3748 0 3748f a pplications i n f or m ation selecting actual r ref , r fb and r tc resistor values the preceding equations define how the lt3748 would regulate the output voltage if the system had no time de- lays and no error sources. however, there are a number of repeatable delays and parasitics in each application which will affect the output voltage and force a re-evaluation of the r fb and r tc component values. the following approach is the best method for selecting the correct values. the expression for v out, developed in the operation sec- tion, can be rearranged to yield the following expression for r fb : r r n v v v v fb ref ps out f tc bg = + ( ) + ? ? ? ? ? where: v out = output voltage v f = output diode forward voltage n ps = effective primary-to-secondary turns ratio v tc = 0.55v the equation assumes the temperature coefficients of the output diode and v tc are equal and substitutes r fb /n ps for the value of r tc . this is a good first order approximation but will be revisited later. first, the value of r ref should be approximately 6.04k since the lt3748 is trimmed and specified using this value. if the impedance of r ref varies considerably from 6.04k, additional errors will result. however, a variation in r ref of several percent is acceptable. this yields a bit of freedom in selecting standard 1% resistor values to yield nominal r fb /r ref ratios. with starting values for r fb and r tc , an initial iteration of the application should be built with final selections of all external components (transformer, diode, mosfet, etc.). the resulting v out should be measured and used to re-evaluate the value of r fb due to non-idealities in the sampling system: r v v r fb new out desired out measured fb old ( ) ( ) ( ) ( ) ? = with a new value of r fb selected, the temperature co- efficient of the output diode in the application can be tested to verify the nominal r tc value. the r tc resistor should be removed from the circuit under test (this will cause v out to increase for this step) and v out should be measured over temperature at a desired target output load. it is very important for this evaluation that uniform temperature be applied to both the output diode and the lt3748if freeze spray or a heat gun is used there can be a significant mismatch in temperature between the two devices that causes significant error. attempting to extrapolate the data from a diode datasheet or assuming the nominal r tc value may yield a better result if there is no method to apply uniform heat or cooling such as an oven. with at least two data points (although more data points from hot to cold are recommended), the change in v/c can be determined by: ? ? v temp v v temp temp out out out = 1 2 1 2 ? ? using the measured v out temperature coefficient, an exact r tc value can be selected using the following equation: r r n mv c v temp tc fb ps out = ? . /1 85 ? ? if the value of r tc has changed significantly, which can happen with the use of some output diodes that have a very low forward drop, the r fb value may need to be changed to restore v out to the desired value. as in the previous iteration, after measuring v out , a new r fb can once again be selected using: r v v r fb new out desired out measured fb old ( ) ( ) ( ) ( ) ? = once the values of r fb and r tc are selected, the regulation accuracy from board to board for a given application will be very consistent, typically under 5% when including device variation of all the components in the system (assuming resistor tolerances and transformer windings matching of 1% or better). however, if the transformer, the output diode or mosfet switch are changed or the layout is dramatically altered, there may be some change in v out .
lt3748 3748f a pplications i n f or m ation minimum primary inductance requirements the lt3748 obtains output voltage information from the external mosfet drain voltage when the secondary winding conducts current. the sampling circuitry needs a minimum of 400ns to settle and sample the output voltage while the mosfet switch is off. this required settle and sample time is controlled by external components independent of the minimum off-time of the gate pin as specified in the electrical characteristics table. the electrical specification minimum off-time is based on an internal timer and acts as a maximum frequency clamp. the following equation gives the minimum value for primary-side magnetizing inductance: l v v r t n v pri out f diode sense settle min ps s + ( ) ( ) ( ) ? ? ? eense min( ) v sense(min) = 15mv t settle(min) = 400ns n ps = ratio of primary windings to secondary windings in addition to the primary inductance requirement for minimum settling and sampling time, the lt3748 has internal circuit constraints that prevent it from setting the gate node high for shorter than approximately 250ns. if the inductor current exceeds the desired current limit during that time oscillation may occur at the output as the current control loop will lose its ability to regulate. therefore, the following equation relating to maximum input voltage must also be followed in selecting primary- side magnetizing inductance: l v ?r ? t pri in(max) sense on(min) ( ) v sense min t on(min) = 250ns the last constraint on minimum inductance value would relate to minimum full-load operating frequency, f min , and is derived from f sw = 1/(t on + t off ): l pri v in(min) ? (v out + v f(diode) ) ? n ps /(f sw(min) ? i lim ? ((v out + v f(diode) ) ? n ps + v in(min) )) the minimum operating frequency may be lower than the calculated number due to delays in detecting current limit and detecting boundary mode that are specific to each application. output power because the mosfet power switch is located outside the lt3748, the maximum output power is primarily limited by external components. output power limitations can be separated into three categoriesvoltage limitations, current limitations and thermal limitations. the voltage limitations in a flyback design are primarily the mosfet switch v ds(max) and the output diode re- verse-bias rating. increasing the voltage rating of either component will typically decrease application efficiency if all else is equal and the voltage requirements on each of those components will be directly related to the windings ratio of the transformer, the input and output voltages and the use of any additional snubbing components. the mosfet v ds(max) must theoretically be higher than v in(max) + (v out ? n ps ) and the output diode reverse bias must be higher than v out + (v in(max) /n ps ), though leak- age inductance spikes on both the drain of the mosfet and the anode of the output diode may more than double that requirement (see section on leakage inductance for more details on snubbers). figure 1 illustrates the effect on available output power for several mosfet voltage ratings while continuously maximizing windings ratio for input voltage with a fixed mosfet current limit and output voltage. increasing the mosfet rating increases the possible windings ratio and or maximum input voltage and can increase the available output power for a given application. both figures assume no leakage inductance and high efficiency. input voltage (v) 0 maximum output power (w) 30 40 50 80 3748 f01 20 10 0 20 40 60 100 v ds = 200v v ds = 150v v ds = 100v figure 1. maximum output power at 12v out with a 3a i lim and maximum v ds = 100v, 150v, 200v
lt3748 3748f the current limitation on output power delivery is gen- erally constrained by transformer saturation current in higher power applications, although the mosfet switch and output diode will need to be rated for the desired currents, as well. increasing the peak current on the pri- mary side of the flyback by reducing the r sense resistor is the primary way to increase output power, and power delivered increases fairly linearly with current limit as shown in figure 2, until parasitic losses begin to dominate. however, once the saturation current of the transformer is exceeded the energy coupling between the primary and the secondary will be reduced and incremental power will not be delivered to the output. in addition, the primary inductance will drop, the sense pin overcurrent threshold may trip due to a corresponding rapid rise in current, and the transformer will have to absorb the energy that is not transferred through the saturated core, leading to heating. some manufacturers may not specify the rated saturation current but it is a necessary specification when trying to minimize transformer size and maximize output power and efficiency. also necessary for proper design is data on saturation current over temperatur e the saturation of typical power ferrites may reduce by over 20% from 25c to 100c. the thermal limitation in flyback applications for lower output voltages will be dominated by losses in the output diode, with resistive and leakage losses in the transformer increasing as a percentage basis of loss as the output voltage is increased. as power levels increase the output diode and transformer may exceed their rated temperature specifications. minimizing rms output diode current, selecting a diode with minimal forward drop at expected currents and minimizing parasitic resistances and leakage inductance in the transformer will keep those components below their maximum temperatures while maximizing efficiency. the following section discussing transformer selection will further help focus on how to minimize losses in the output diode. while quiescent current in the lt3748 itself is low (ap- proximately 300a from v in and 1ma from intv cc ), the current required to drive the external mosfet (f sw ? q g ), if drawn from v in through the lt3748 intv cc ldo, dissipates (v in C intv cc ) ? f sw ? q g . if that power is high enough to cause significant heating of the lt3748 the current may need to be drawn from a third winding. doing so will push all thermal limitations outside of the lt3748. selecting a transformer transformer specification and design is perhaps the most critical part of successfully applying the lt3748. in addition to the usual list of caveats dealing with high frequency isolated power supply transformer design, the following information should be carefully considered. first and most importantly, since the voltage on the sec- ondary side of the transformer is inferred by the voltage sampled on the primary, the transformer turns ratio must be tightly controlled to ensure a consistent output volt- age. a tolerance of 5% in turns ratio from transformer to transformer could result in a variation of more than 5% in output regulation. fortunately, most magnetic component manufacturers are capable of guaranteeing a turns ratio tolerance of 1% or better. linear technology has worked with several leading mag- netic component manufacturers to produce predesigned flyback transformers for use with the lt3748. table 1 shows the details of several of these transformers. a pplications i n f or m ation input voltage (v) 0 maximum output power (w) 30 40 50 80 3748 f02 20 10 0 20 40 60 100 i lim = 3a i lim = 2a i lim = 1a figure 2. maximum output power at 12v out with 150v v ds(max) and i lim = 1a, 2a, 3a
lt3748 3748f a pplications i n f or m ation table 1. pre-designed transformerstypical specifications unless otherwise noted transformer part number size (w x l x h) mm l pri (h) l leak (nh) n ps (n p :n s ) i sat (a) r pri (m) r sec (m) manufacturer target application ? input (v) output 750311424 17.7 14.0 12.7 100 844 3:1 3 180 29 wrth electronics 40 to 75 12v/1a 750311456* 17.7 14.0 12.7 100 900 3:1 2.4 225 31 wrth electronics 40 to 75 12v/1a 750311439 17.7 14.0 12.7 37 750 2:1 2.8 89 28 wrth electronics 30 to 75 12v/1a 750311423 17.7 14.0 12.7 50 570 4:1 4 90 12 wrth electronics 30 to 75 5v/3a 750311457 17.7 14.0 12.7 50 600 4:1 3.7 115 12 wrth electronics 30 to 75 5v/3a 750311689 17.7 14.0 12.7 50 600 4:1 3.7 115 12 wrth electronics 30 to 75 5v/3a 750311458* 17.7 14.0 12.7 15 175 3:1 5 35 6 wrth electronics 10 to 40 5v/2.5a 750311564 17.7 14.0 12.7 9 120 3:1 8 36 7 wrth electronics 10 to 40 5v/3a 750311624 17.7 14.0 12.7 9 150 1.5:1 8 34 21 wrth electronics 10 to 40 15v/1a 750311604 29.08 23.11 11.43 8 300 1:1 9.5 30 12 wrth electronics 10 to 40 24v/1.3a 750311599 29.08 23.11 11.43 8 500 1.5:1 12 30 12 wrth electronics 10 to 40 15v/2a 750311600 29.08 23.11 11.43 12 500 3:1 11 30 40 wrth electronics 20 to 75 15v/2a 750311608 29.08 23.11 11.43 12 500 1.5:1 9 30 20 wrth electronics 20 to 75 24v/1.3a 750311607 29.08 23.11 11.43 14 500 2.5:1 9.5 40 10 wrth electronics 20 to 75 12v/2.5a 750311590 32.31 27.03 13.69 8 200 2:1 18 15 8 wrth electronics 10 to 40 12v/3.8a 750311591 32.31 27.03 13.69 8 200 1.5:1 20 15 12 wrth electronics 10 to 40 15v/3a 750311592 32.31 27.03 13.69 8 200 1:1 18 15 20 wrth electronics 10 to 40 24v/1.9a 750311594 32.31 27.03 13.69 15 400 2.33:1 18 35 15 wrth electronics 20 to 75 12v/3.8a 750311595 32.31 27.03 13.69 12 200 3:1 18 15 12 wrth electronics 20 to 70 15v/3a 750311596 32.31 27.03 13.69 12 200 1.5:1 16 30 30 wrth electronics 20 to 70 24v/1.9a pa2367nl 17.7 14.0 12.7 85 750 2.7:1 1.7 325 26 pulse engineering 20 to 75 12v/1a pa1276nl 17.7 14.0 12.7 77.4 800 1.47:1 1.6 100 75 pulse engineering 20 to 75 12v/1a pa2467nl 17.7 14.0 12.7 37 750 2:1 2.9 89 28 pulse engineering 20 to 75 12v/1a pa1260nl 17.7 14.0 12.7 77.4 800 3.67:1 1.5 220 18 pulse engineering 20 to 75 5v/2a pa3177nl 29.21 21.84 11.43 8.3 100 2:1 8.6 10 7 pulse engineering 10 to 40 10v/2.5a *2.5k isolation, others are rated for 1.5kv isolation. ? target application, not guaranteed. turns ratio and rms diode current note that when using an r fb /r ref resistor ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. in contrast, simpler ratios of small integers (e.g., 1:1, 2:1, 3:2, etc.) can be employed to provide more freedom in setting total turns and mutual inductance. while the turns ratio can be selected to maximize output power for a given current limit, minimizing the turns ratio and increasing the current limit will often increase efficiency and better utilize the saturation current of a given transformer. figure 3 shows the maximum output power using three transformers with different windings ratios that have the same output inductance and peak output current, illustrating that increasing current while decreasing turns ratio can deliver more power. there are two significant constraints on the turns ratio. first, as described in the previous section on limitations to output power, the drain of the mosfet switch will see a voltage equal to the maximum input supply plus
lt3748 3748f a pplications i n f or m ation the output voltage multiplied by the windings ratio plus some amount of overshoot caused by leakage inductance. second, increasing the turns ratio will increase the peak current seen on the output diode generally increasing the rms diode current thereby lowering the efficiency. this efficiency limitation is worse at lower output voltages when the diode forward voltage is significant compared to the output voltage. in a typical application such as the 5v, 2a output shown on the back page, the diode losses dominate all the other losses, as shown in figure 4. to calculate rms diode current, two equations are neededthe first for calculating duty cycle, d, and the second to calculate the rms current of a triangle waveform: d v v n v v v n i out f dode ps in out f diode ps d = + ( ) + + ( ) ( ) ( ) ? ? iiode rms lim ps i n d ( ) ? ? ? = ( ) ( ) 2 1 3 for a more general analysis, figure 5 illustrates a sweep of windings ratio on the x-axis while comparing output power and estimated efficiency for a 5v output using a 48v input. if the desired application required 20w, the maximum power curve indicates that a winding ratio of 12:1 would be sufficient at a current limit of 2a (r sense = 0.05), while a winding ratio of 5:1 would deliver the same power at 3a. however, when examining the corresponding efficiency at max load for those two windings ratios and current limits, the 5:1, 3a selection is clearly the superior solution with an estimated efficiency of 85% compared to 78% for the 12:1, 2a application. there are several caveats to this evaluation. first, as the diode forward voltage becomes a smaller percentage of total loss at higher output voltages (>12v) the rms current becomes less of a concern and minimizing it will have a much smaller impact on efficiency. more significantly, if a lower turns ratio forces the use of a diode with a larger forward drop to obtain a higher reverse voltage rating, any gains from minimizing current might be lost. for low output voltages (3.3v or 5v) or high input voltages (>48v), a turns ratio greater than one can be used with multiple primary windings relative to the secondary to maximize the transformers current gain. input voltage (v) 0 output power (w) 15 20 25 80 3748 f03 10 5 0 20 40 60 100 n ps = 2:1 i lim = 3a n ps = 3:1 i lim = 2a n ps = 6:1 i lim = 1a i out (a) 0.2a min 70 efficiency loss (%) 75 80 85 90 100 2a max 3748 f03 95 v in = 12v d out f sw ? q g + i q transformer i ? r + leakage fet r ds(on) n ps 0 estimated max load efficiency (%) maximum output power (w) 75 80 85 9 15 3748 f05 70 65 60 3 6 12 90 95 100 12 16 20 8 4 0 24 28 32 18 i lim = 3a i lim = 2a efficiency output power figure 3. maximum output power at 12v out using three transformers with equal peak output current and secondary inductance figure 4. sources of loss in 5v, 2a out typical application figure 5. estimated efficiency and output power at 5v out from 48v in vs windings ratio, n ps , at 2a and 3a current limits
lt3748 3748f a pplications i n f or m ation saturation current as discussed earlier in the maximum output power sec- tion, because the core of the transformer is being used for energy storage in a flyback, the current in the transformer windings should not exceed their rated saturation current as energy injected once the core is saturated will not be transferred to the secondary and will instead be dissipated in the core. information on saturation current should be provided by the transformer manufacturers and table 1 lists the saturation current of the transformers designed for use with the lt3748. leakage inductance and snubbers transformer leakage inductance (on either the primary or secondary) causes a voltage spike to appear at the primary after the mosfet switch turns off. this spike is increasingly prominent at higher load currents where more stored energy must be dissipated. transformer leakage inductance should be minimized. in most cases, proper selection of the external mosfet and a well designed transformer will eliminate the need for snubber circuitry, but in some cases the optimal mosfet may require protection from this leakage spike. an rc (resistor capacitor) snubber may be sufficient in applica- tions where the mosfet has significant margin beyond the predicted dc drain voltage applied in flyback while a clamp using an rcd (resistor capacitor diode) or a zener might be a better option when using a mosfet with very little margin for leakage inductance spiking. the recommended approach for designing an rc snubber is to measure the period of the ringing at the mosfet drain when the mosfet turns off without the snubber and then add capacitancestarting with something in the range of 100pfuntil the period of the ringing is 1.5 to 2 times longer. the change in period will determine the value of the parasitic capacitance, from which the parasitic inductance can be determined from the initial period, as well. similarly, initial values can be estimating using stated switch capaci- tance and transformer leakage inductance. once the value of the drain node capacitance and inductance is known, a series resistor can be added to the snubber capacitance to dissipate power and critically dampen the ringing. the equation for deriving the optimal series resistance using the observed periods (t period , and t period(snubbed) ) and snubber capacitance (c snubber ) is below, and the resultant waveforms are shown in figure 6. c c t t l par snubber period snubbed period p = ? ? ? ? ? ? ( ) ? 2 1 aar period par snubber par par t c r l c = = 2 2 4? time (s) 0 0 v drain (v) 10 30 40 50 0.20 90 3748 f06 20 0.10 0.05 0.25 0.15 0.30 60 70 80 no snubber with snubber capacitor with resistor and capacitor figure 6. observed waveforms at mosfet drain when iteratively implementing an rc snubber note that energy absorbed by a snubber will be converted to heat and will not be delivered to the load. in lower power applications, the snubber may significantly reduce efficiency and in higher power applications, the snubber may need to be sized for thermal dissipation. to determine the power dissipated in the snubber resistor, it is easiest to measure the peak voltage across the snubber capaci- tance once the series resistance has been added and then use the following equation relating that voltage and the mosfet switching frequency to determine the maximum power dissipation assuming the capacitor is completely discharged each cycle: p snubber(max) = f sw ? c snubber ? v peak 2 decreasing the value of the capacitor may reduce the dis- sipated power in the snubber at the expense of increased
lt3748 3748f a pplications i n f or m ation ring beyond that expected reverse voltage. an rc snubber or rcd clamp may be implemented to reduce the voltage spike if it is desirable to use a lower reverse voltage diode. secondary leakage inductance in addition to the previously described effects of leakage inductance in general, leakage inductance on the secondary in particular exhibits an additional phenomena. it forms an inductive divider on the transformer secondary that effec- tively reduces the size of the primary-referred flyback pulse used for feedback. this will increase the output voltage target by a similar percentage. note that, unlike leakage spike behavior, this phenomena is load independent. to the extent that the secondary leakage inductance is a constant percentage of mutual inductance (over manufacturing voltage on the mosfet drain, while decreasing the value of the resistor and optionally increasing the capacitance as well will decrease the overshoot. an example of an rc snubber with minimal power dissipation but sufficient protection for the mosfet switch is shown in the 48v, 0.5a output typical application, figure 17. an rcd clamp, shown in figure 7, also prevents the leakage inductance spike from exceeding the breakdown voltage of the mosfet switch. in most applications, there will be a very fast voltage spike caused by a slow clamp diode. once the diode clamps, the leakage inductance current is absorbed by the clamp capacitor. this period should not last longer than 200ns so as not to interfere with the output regulation. the clamp diode turns off after the leakage inductance energy is absorbed and the switch voltage is then equal to: v ds = v in + n ps ? (v out + v f(diode) ) schottky diodes are typically the best choice for use in a snubber, but some pn diodes can be used if they turn on f a st enough to limit the leakage inductance spike. figures 8 and 9 show the waveform at the drain of the mosfet switch for the 48v output application shown in figure 17 at maximum rated load and maximum input voltage with an rc snubber and rcd clamp, respectively. both solu- tions limit the leakage spike to less than 190v, below the 200v v ds(max) rating of the si7464dp mosfet. figure 7. rcd clamp figure 8. waveform of mosfet drain during normal operation of figure 17 with rc snubber (as drawn) 3748 f07 l leak v in v out + v out ? gate nmos d r c + figure 9. waveform of mosfet drain during normal operation of figure 17 using rcd clamp with central semiconductor cmr1u-02m-ltc instead of rc snubber time (ns) 0 0 drain voltage (v) 40 80 120 50 100 150 200 3748 f08 250 160 200 20 60 100 140 180 300 v in = 96v v out = 48v i out = 0.5a r = 66 c = 150pf time (ns) 0 0 drain voltage (v) 40 80 120 50 100 150 200 3748 f08 250 160 200 20 60 100 140 180 300 v in = 96v v out = 48v i out = 0.5a r = 4.99k c = tdk 0.22f 250v d = cmr1u-02m-ltc leakage inductance and output diode stress the output diode may also see increased reverse voltage stresses from leakage inductance. while it nominally sees a reverse voltage of the input voltage divided by the wind- ings ratio plus the output voltage when the mosfet power switch turns on, the capacitance on the output diode and the leakage inductance will cause an lc tank which may
lt3748 3748f a pplications i n f or m ation variations), this can be accommodated by adjusting the r fb /r ref resistor ratio. winding resistance effects resistance in either the primary or secondary will reduce overall efficiency (p out /p in ). good output voltage regula- tion will be maintained independent of winding resistance due to the boundary mode operation of the lt3748. bifilar winding a bifilar, or similar winding technique, is a good way to minimize troublesome leakage inductances. however, re- member that this will also increase primary-to-secondary capacitance and limit the primary-to-secondary breakdown voltage, so, bifilar winding is not always practical. the linear technology applications group is available and extremely qualified to assist in the selection and/or design of the transformer. selecting a current sense resistor the external current sense resistor allows the user to optimize the current limit behavior for the particular ap- plication under consideration. as the current sense resistor is varied from several ohms down to tens of milliohms, peak switch current goes from a fraction of an ampere to tens of amperes. care must be taken to ensure proper circuit operation, especially with small current sense resistor values. for example, a peak mosfet switch current of 4a requires a sense resistor of 0.025. note that the instantaneous peak power in the sense resistor is 1w, and it must be rated accordingly. the lt3748 has only a single sense line to this resistor. therefore, any parasitic resistance in the ground side connection of the sense resistor will increase its apparent value. in the case of a 0.025 sense resistor, 1m of parasitic resistance will cause a 4% reduction in peak switch current. therefore, resistance of printed circuit copper traces and vias cannot necessarily be ignored. another issue for proper operation of the current sense circuitry is avoiding prematurely tripping the sense threshold while slewing the mosfet drain when the gate pin goes high. the lt3748 does not begin to compare the sense pin voltage with the target threshold until the gate pin is near its final value, or until at least 150ns has passed, whichever occurs more slowly. this should be entirely sufficient for most applications but premature tripping of the sense comparator may occur in cases where a mosfet with very high q g is used with a series resistor at the gate pin. output short circuits and sense pin over current the lt3748 has an internal threshold to detect when primary inductor current exceeds the programmed range. this can result from an inductive output short-circuit and an output voltage below zero, reflecting a voltage back to the primary side of the transformer which, in turn, causes the lt3748 to turn the external mosfet on before the secondary current has discharged. when the voltage at the sense pin exceeds approximately 130mvequivalent to 30% higher than the programmed i lim(max) in the r sense resistorthe ss pin will be reset, stopping switching. once the soft-start capacitor is recharged and the soft- start threshold is reached, switching will resume at the minimum current limit. high drain capacitance and low current operation when designing applications with some combination of a low current limit (i lim < 1a), a high secondary-to-primary turns ratio (n ps << 1), multiple output windings, or very capacitive output diodes, it is important to minimize the capacitance reflected onto the primary winding and on the drain of the external mosfet. after the mosfet turns off during each switching cycle, the primary current charges that capacitance to slew the mosfet drain until the second- ary begins to deliver power, and if the drain node does not slew and remain above v in within approximately 200ns once the gate pin goes low and the mosfet turns off, the lt3748 may detect that the current in the secondary is zero and turn the mosfet back on prematurely, caus- ing the lt3748 to switch continuously while delivering very little power to the output. the result will be droop of the output voltage at lighter loads and oscillation at the v c node. this problem can be prevented by maximizing n ps (minimizing ratio of secondary windings to primary windings), increasing the peak drain current (minimizing r sense ), and minimizing the output diode and transformer capacitance.
lt3748 3748f a pplications i n f or m ation soft-start the lt3748 contains an optional soft-start function that is enabled by connecting an explicit external capacitor between the ss pin and ground. internal circuitry prevents the control voltage at the v c pin from exceeding that on the ss pin. the soft-start function is engaged whenever power at v in is removed, or as a result of either undervoltage lockout, overcurrent in the sense resistor or thermal (overtemperature) shutdown. the ss node is then discharged to roughly 600mv. when this condition is removed, a nominal 5a current acts to charge up the ss node towards roughly 2.2v. for example, a 0.1f soft-start capacitor will place a 0.05v/ms limit on the turn-on ramp rate at the v c node. enable and undervoltage lockout (uvlo) a resistive divider from v in to the en/uvlo pin implements undervoltage lockout (uvlo). the en/uvlo pin threshold is set at 1.223v. in addition, the en/uvlo pin draws 2.4a when the voltage at the pin is below 1.223v. this current provides user programmable hysteresis based on the value of r1. the effective uvlo thresholds are: v v r r r a r v in uvlo rising in u ( , ) ( . ? ( ) . ? = + + 1 223 1 2 2 2 4 1 vvlo falling v r r r , ) . ? ( ) = + 1 223 1 2 2 figure 10 shows the implementation of external shutdown control while still using the uvlo function. the nmos grounds the en/uvlo pin when turned on, and puts the lt3748 in shutdown with a quiescent current draw of less than 1a. minimum load requirement the lt3748 recovers output voltage information using the flyback pulse that occurs once the external mosfet turns off and the secondary winding conducts current. in order to regulate the output voltage, the lt3748 needs to sample the flyback pulse. the lt3748 delivers a minimum amount of energy even during light load conditions to ensure accurate output voltage information. the minimum delivery of energy creates a minimum load requirement on the output of approximately 2% of maximum load. the minimum operating frequency at minimum load is approximately 42khz. alternatively, a zener diode sufficiently rated to handle the minimum load power can be used to provide a minimum load without decreasing efficiency in normal operation. in selecting a zener diode for this purpose, the zener voltage should be high enough that the diode does not become the load path during transient conditions but the voltage must still be low enough that the mosfet and output voltage ratings are not exceeded when the zener functions as the minimum load. intv cc pin considerations the intv cc pin powers the internal circuitry and gate driver of the lt3748. three unique configurations exist for regulation of the intv cc pin as shown in figure 11. in the first configuration, the internal ldo drives the intv cc pin internally from the v in supply. in the second configuration, the v in supply directly drives the intv cc pin through a direct connection bypassing the internal ldo. use this optional configuration for voltages lower than 20v. in the third configuration, an external supply or third winding drives the intv cc pin. use this option when a voltage supply exists lower than the input supply but higher than the regulated intv cc voltage. using a lower voltage supply provides a more efficient source of power for internal circuitry and reduces power dissipation in the lt3748. when calculating the minimum input voltage required for a valid intv cc , or the power dissipated in the lt3748, it is useful to know how much current will be drawn from the intv cc ldo during normal operation. the easiest way to calculate this current is to use the gate charge (q g ) for the lt3748 en/uvlo gnd r2 r1 v in 3748 f10 run/stop control (optional) figure 10. undervoltage lockout (uvlo)
lt3748 3748f a pplications i n f or m ation selected mosfet switch at the expected v in and intv cc voltages and multiply that charge required with each turn-on event by the maximum operating frequency. the maximum operating frequency in a given application can be approximated from the primary transformer inductance, the windings ratio (n ps ), the nominal output voltage and the maximum input voltage. unless the part is limited by minimum on- or off-times, this maximum frequency will occur when the part is regulating in boundary mode at the minimum peak switch current, and can be derived from: f v v v n l i sw max in max out f diode ps pri lim ( ) ( ) ( ) ? ? ? + ( ) (( ) ( ) ( ) ? ? min out f diode ps in max v v n v + + ( ) with the maximum intv cc current calculated, the expected dropout when v in drops below 7v can be extracted from the curves in the typical performance characteristics sec- tion. the lt3748 is tested as low as v in = 5v but the hard limit on minimum v in operation is the intv cc regulator dropout and the 3.6v under voltage lockout. figure 12 illustrates an example where operation with v in = 5v and i intvcc = 20ma might be fully functional at room temperature, but when the dropout for the same current exceeds 1.4v and trips the uvlo at higher temperatures the lt3748 will stop switching. overdriving intv cc with a third winding the lt3748 provides excellent output voltage regulation without the need for an opto-coupler or third winding, but for some applications with input voltages greater than 20v, an additional winding may improve overall system efficiency. the third winding should be designed to out- put a voltage between 7.2v and 20v. for a typical 48v in , 10w application, overdriving the intv cc pin may improve efficiency by several percent at maximum load and as much as 30% at light loads. loop compensation the lt3748 is compensated using an external resistor- capacitor network on the v c pin. typical values are in the range of r c = 50k and c c = 1nf (see the numerous sche- matics in the typical applications section for other possible values). if too large of an r c value is used, the part will be more susceptible to high frequency noise and jitter. if too small of an r c value is used, the transient performance will suffer. the value choice for c c is somewhat the inverse of the r c choice: if too small a c c value is used, the loop may be unstable and if too large a c c value is used, the transient performance will also suffer. transient response plays an important role for any dc/dc converter. lt3748 3.6v < bias < 20v, v in > bias 5v to 100v intv cc v in 3748 f09 external supply or third winding ldo lt3748 (v in ? dropout) to 7v 5v to 100v intv cc v in ldo lt3748 5v to 20v intv cc v in optional ldo figure 11. intv cc pin configurations temperature (oc) ?50 0 intv cc dropout (v) 0.5 1.0 1.5 2.0 0 50 100 150 3748 f12 2.5 3.0 ?25 25 75 125 v in = 5v intv cc uvlo = 3.6v i intvcc = 20ma figure 12. intv cc current at low v in can cause the lt3748 to stop switching due to intv cc undervoltage lockout
lt3748 0 3748f design example: 12v in to 5v, 2a out the first example is an automotive application shown on the back page of this data sheeta nominal 12v in , 5v out at 2a with an operating input voltage range of 6v to 45v with a design focus of maximizing efficiency. 1. select transformer turns ratio transformer turns ratio will affect the requirements for the mosfet switch v ds rating, the output diode reverse bias rating, the output power capability, and the efficiency of the overall converter. because the output voltage is low compared to the forward drop on the output diode and the currents are high in this application, efficiency can be optimized by minimizing the rms diode current. although typical efficiency in a variety of applications will be 85% to 90%, due to compromises made for the wide input voltage range and due to the low output voltage in this specific application, an efficiency of 80% is assumed for calculating output power. this assumption can be revised once the application is tested. equations for evaluating each of the important criteria are: n ps = n p /n s v ds(max) v in(max) + v out ? n ps v r(diode) v in(max) /n ps + v out i out(max) 0.80 ? (1 C d) ? n ps ? i lim /2 d = (v out + v f(diode) ) ? n ps /(v in + (v out + v f(diode) ) ? n ps ) i diode(rms) = (i lim ? n ps ) 2 ? (1 C d)/3 the equation for output power can be rearranged to solve for the current limit, i lim , which can be solved at the nominal or the minimum v in depending on application requirements. in this application the 2a load requirement will be set at v in = 9v to reduce operating stresses at higher input voltages. the results of the aforementioned equations in this application are found in table 2. a pplications i n f or m ation evaluating the results of the table, the 1:2 turns ratio looks demanding in terms of diode reverse-voltage requirements (a diode with higher reverse bias capability generally will have a larger forward drop and therefore lower application efficiency) and primary side currents and only decreases the output diode rms current by 13% from the 1:1 case. however, on evaluating the minimum and maximum in- ductance requirements in step 3, even the 1:1 case does not allow for enough on-time from maximum v in for the range of inductance that provides sufficient off-time. for that reason, a 2:1 turns ratio is selected, easing the requirement on the output diode reverse voltage rating in the process. 2. calculate sense resistor value the sense resistor can be calculated by the following equation: r mv i sense lim = 100 the desired 6a current limit leads to an unusual value of 0.017, so the current limit is increased to use a more standard 0.016 value and i lim of 6.25a. 3. select a transformer based on inductance and saturation current requirements the transformer in this application will be selected to optimize efficiency at a 80khz minimum switching fre- quency at maximum load from the nominal input voltage. in applications where transformer size is the primary requirement, reducing the current limit or increasing the switching frequency may be required. the following equa- tions select the inductance required for a given switching frequency at max load and then verify that the inductance is large enough to satisfy the minimum on and off times of the lt3748. table 2. voltage stresses, output capability and diode current vs turns ratio in 12v in to 5v, 2a application n ps v ds(max) v r(diode) d (v in = 12v) d (v in = 9v) i lim (2a out at v in = 9v) i diode(rms) (v in = 12v) 0.5 47.5 95 0.19 0.23 13 3.4 1 50 50 0.31 0.38 8 3.9 2 55 27.5 0.48 0.55 6 4.6 3 60 20 0.58 0.65 5 5.3
lt3748 3748f l pri v in(min) ? (v out + v f(diode) ) ? n ps /(f sw(min) ? i lim ? ((v out + v f(diode) ) ? n ps + v in(min) )) l pri (v out + v f(diode) ) ? r sense ? 400ns ? n ps /15mv l pri v in(max) ? r sense ? 200ns/15mv for this application, the primary inductance with a 2:1 transformer and a 0.016 sense resistor for an 6.25a current limit is bounded by the minimum desired switch- ing frequency and the minimum off time requirement to be between 9.6h and 11.5h. looking at table 1, there are no transformers that fit that exact requirement. for the sake of prototyping, a transformer with slightly less than the desired primary inductance is selected with the pa3177nl. the application will need to be tested thoroughly for sta- bility at higher input voltages and when the current limit is at a minimum (in the middle of the output load range). the easiest solution to ease the requirement on minimum on-time is to reduce the maximum v in voltage although alternatively n ps could be increased at the expense of ef- ficiency (and requiring a more thorough redesign). 4. select a mosfet switch the selected 2:1 transformer requires a nominal 55v rating on the mosfet switch, assuming no leakage inductance. however, even a small amount of leakage inductance may cause the drain to ring to double the anticipated voltage, and generally this needs to be verified in the final design. however, at currents below 10a it is fairly easy to find a mosfet with sufficiently low r ds(on) to be a very small contributor to maximum load efficiency losses while similarly having a low enough q g to require minimum current and minimal losses when driving the mosfet at lighter loads. also, while considering the efficiency gains and losses with a given mosfet, it is important to real- ize that a trade-off in r ds(on) for v ds(max) may backfire if a snubber needs to be added to the circuit to meet the voltage requirements and dissipates more energy than the difference in switch resistance. for that reason, a vishay si7738 is selected to give lots of margin with its 150v rating. the rms current in the mosfet can be calculated, squared and multiplied by the r ds(on) to calculate losses and the current required to drive the fet at frequency can be determined, by the following equations: i mosfet(rms) = i lim 2 ? d/3 i intvcc = f sw ? q g p intvcc = i intvcc ? (v in C v intvcc ) in this application the mosfet rms current at maximum load is about 2.7a, which into the 0.038 r ds(on) will be 0.28w, or on the order of 2% loss in efficiency. assuming that the maximum operating frequency is around four times higher than the maximum load frequency (at about a quarter the output load) and reading the approximate q g at 7v operation from the vishay data sheet, the approximate intv cc current is likely close to 8ma, dissipating 0.04w when the load is on the order of 2.5w, or less than 2%, and much less at maximum load. 5. select the output diode the output diode reverse voltage, as calculated earlier, is the first important specification for the output diode. as with the mosfet, choosing a diode with enough margin should preclude the use of a snubber. the second criterion is the power requirement of the diode which is more difficult to correctly ascertainsome manufacturers give direct data about power dissipation versus duty cycle, which can be used with the data from the table to determine. to avoid using a snubber, a diode with a 60v reverse-bias capabil- ity and minimal forward drop was selectedin this case, the diodes inc. sbr 8u60p5. in this particular application where maximizing efficiency is the goal, minimizing the maximum voltage requirement on v in may allow the use of a diode with a lower reverse bias rating and a lower forward drop which could further increase efficiency. al- ternatively, if no efficient diode is available for a particular reverse bias rating, it may be more beneficial to increase the windings ratio until a diode with low forward drop can be selected and then reevaluate whether that solution with higher rms diode current is beneficial. a pplications i n f or m ation
lt3748 3748f 6. select the feedback resistor for proper output voltage using the iterative process laid out earlier in the applications information section, select the feedback resistor r fb and program the output voltage to 5v. adjust the r tc resistor for temperature compensation of the output voltage. r ref is selected as 6.04k. 7. select the output capacitor the output capacitor should be chosen to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor. the following equation calculates the output voltage ripple: ? v l i c v max pri lim out out = ? ? ? 2 2 8. add snubber circuitry as necessary with the primary components selected, the application should be constructed to evaluate ringing at the drain of the mosfet switch and to evaluate step response to optimize the compensation network. if using an rc snubber, the equations from the applications information section can be used or a rough estimate of component values may come from using the published leakage inductance of the transformer and selecting a snubber capacitor ranging from 2 to 3 times larger than the published mosfet output capacitance. in this example, at maximum load while at maximum input voltage, the drain of the mosfet switch is probed and measured to peak at approximately 125v, well below the 150v rating of the si7738. similarly, the anode of the output diode is probed to look at potential ringing when the mosfet switch turns on and a peak of 45v is measured across the diode. therefore, no snubber circuitry is required. a pplications i n f or m ation 9. optimize the compensation network to set the compensation, the application is first configured with a 22nf capacitor and 10k resistor as a starting point. a load step is applied at both light and heavy loads at the 60v maximum input voltage and the capacitance is decreased until damping decreases to the desired limit, in this case with a compensation capacitance of 2.2nf and a response implying about 60? of phase margin. after verifying stability at the minimum input voltage, as well, the compensation capacitance is doubled for safety margin. the series re- sistance is varied from 5k to 50k but the optimal response is observed with 25k. for best ripple performance, select a compensation capacitor not less than 1nf, and select a compensation resistor not greater than 50k. 10. soft-start capacitor and uvlo resistor divider a soft-start capacitor helps during the start-up of the flyback converter. select the uvlo resistor divider for the intended input operation range. these equations are aforementioned. design example: 48v in to 12v, 2a out the second example is a telecom application shown on the front page of the datasheet. the focus of this application is a cheap, small and simple solution. table 3 shows the results of the initial step for selecting the turns ratio. in this example, the output diode is a much smaller ef- ficiency loss due to the smaller voltage drop across it in ratio to v out so minimizing output diode current is not as important. of greater importance is minimizing the stresses on the mosfet and output diode and the 4:1 case seems to be the best compromise for that to avoid using a snubber on either device. table 3. voltage stresses, output capability and diode current vs turns ratio in 48v in to 12v, 2a application n ps v ds(max) v r(diode) d (v in = 48v) d (v in = 36v) i lim (2a out at v in = 36v) i diode(rms) (v in = 48v) 1 84 84 0.21 0.26 6 3.3 2 96 48 0.34 0.41 4 3.7 4 120 30 0.51 0.58 3 4.6 6 144 24 0.61 0.68 2 5.2
lt3748 3748f a pplications i n f or m ation 20h of primary inductance is required for minimum off-time while selecting the transformer, but in order to minimize output ripple at maximum load a 60.8h trans- former is selected. to meet the saturation current (12a, peak, on the secondary windings), a versa-pak vp4-0047-r provides a compact and efficient solution. for the mosfet switch, since the input voltage is so high, resistive losses on the primary side will be very low so minimizing r ds(on) is of minimum benefit. however, since the current for the gate drive is pulled from a high v in , minimizing both q g and operating frequency is essential unless a third winding is added. the vishay si7464dp, with a 200v v ds(max) and low gate charge, keeps the intv cc current to just over 3ma, worst-case, which when added to quiescent current will keep power dissipation in the lt3748 to just over 1/4w at 72v v in . the output diode only nominally has 30v of reverse bias but a b360 diode is selected to ensure enough margin that a snubber will not be required. a more expensive diode with lower forward drop might recover several percent efficiency and if high temperature operation is required a diode rated for more average current at temperature might be needed, but the b360 is small and inexpensive. the rest of the design and component selection is straight- forward. suggested layout see figures 13 and 14 for the dc1557a demo board layout. note the proximity of the r ref and r fb resistors (r9, r5) to the lt3748 for optimal regulation. the location of these two resistors as close to the physical pins of the lt3748 is critical for accurate regulation. in addition, the high frequency current path from the v in bypass capacitor (c2) through the primary-side winding, the mosfet switch and sense resistor (r10) is a very tight loop. similarly, the high frequency current path for the mosfet gate switching from the intv cc capacitor through the source of the mosfet and sense resistor is similarly small in area. for improved regulation it is recommended that the user ensure that the high current ground is kept separate or at least physically isolated from the small-signal ground used by the other ground-referenced pins.
lt3748 3748f figure 14. demo board topside metal figure 13. demo board topside silkscreen a pplications i n f or m ation
lt3748 3748f figure 15. automotive igbt controller supply en/uvlo tc ss r fb r ref v c gnd intv cc lt3748 3748 f15 133k 2nf v in 12v typ v in t1 1:1:1:1:1 d1 15v 300ma 825k 150k 10 f 6 h c1 gate sense 1 f 4700pf 4.7 f 6.04k 71.5k 0.0125 m1 10k igbt driver d2 15v 300ma c2 igbt driver d3 15v 300ma c3 igbt driver d4 15v 300ma c1-c4: 22h 25v x7r s2 d1-d4: diodes inc. pds3100 m1: vishay si7898dp t1: coiltronics versa-pac vp4-0075-r c4 igbt driver 320v 0v 3-phase motor typical a pplications figure 16. 300v isolated flyback converter en/uvlo tc ss r fb r ref v c gnd intv cc lt3748 3748 f16 r6 24.9k v in 7v to 15v v out + 300v 8ma v out + 300v 8ma v out ? v in t1 1:10:10 r1 357k r2 93.1k c1 10 f c5 gate sense c2 1 f c7 0.1 f c4 2.2nf c9 100pf c3 4.7 f r4 6.04k r3 140k r5 10k r7 600k r8 600k d1 danger high voltage! operation by high voltage trained personnel only d3 50m m1 v out ? c6 c8 0.22f 50v d2 c5, c6: 0.1f 600v s2 d1, d2: central semiconductor cmr1u-06m ltc m1: fairchild fdm3622 t1: w rth elektronik 750311486
lt3748 3748f typical a pplications figure 17. 48v, 0.5a supply from 24v to 96v input en/uvlo tc ss r fb r ref v c gnd intv cc lt3748 3748 f17 243k 2nf v in 48v typ v out + 48v 0.5a v out ? v in t1 1:1 825k 49.9k 4.7 f 40 h 4.7 f 100v s3 gate sense 0.22 f 4700pf 4.7 f 6.04k 221k 66 150pf 0.030 d1: central semiconductor cmr5u-02-ltc m1: vishay si7464dp t1: coiltronics versa-pac vp4-0060-r m1 10k output current (a) 0 efficiency (%) 75 80 85 0.3 0.5 3748 f18 70 65 60 0.1 0.2 0.4 90 95 100 v in = 24v v in = 48v v in = 96v figure 18. efficiency of 48v supply of figure 17
lt3748 3748f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage description msop (ms12) 0510 rev a 0.53 p 0.152 (.021 p .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 1.0 (.0394) bsc 0.50 (.0197) bsc 16 14 121110 1 3 5 6 7 8 9 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0o ? 6o typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 p 0.127 (.035 p .005) recommended solder pad layout 0.305 p 0.038 (.0120 p .0015) typ 0.50 (.0197) bsc 1.0 (.0394) bsc 4.039 p 0.102 (.159 p .004) (note 3) 0.1016 p 0.0508 (.004 p .002) 3.00 p 0.102 (.118 p .004) (note 4) 0.280 p 0.076 (.011 p .003) ref 4.90 p 0.152 (.193 p .006) ms package varitation: ms16 (12) 16-lead plastic msop with 4 pins removed (reference ltc dwg # 05-08-1847 rev a)
lt3748 3748f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0710 ? printed in usa r elate d p arts t ypical a pplication 5v, 2a output from automotive input with continuous operation from 6v to 45v en/uvlo tc ss r fb r ref v c gnd intv cc lt3748 3748 ta02 34.8k 2nf v in 12v typ v out + 5v, 2a 50mv p-p ripple v out ? v in t1 2:1 d1 d2 825k 215k 10 f 8.3 h gate sense 100 f 10v 2.2nf 4.7 f 6.04k 52.3k 0.016 d1: diodes inc. sbr8u60p5 d2: diodes inc. bzt52c5v6 m1: si7738dp t1: pulse pa3177nl m1 25k part number description comments lt3573 40v isolated flyback converter monolithic no-opto flyback with integrated 1.25a, 60v switch lt3574/lt3575 40v isolated flyback converters monolithic no-opto flybacks with integrated 0.65a / 2.5a 60v switch lt3757/lt3758 40v/100v flyback, boost controllers universal controllers with small package and powerful gate drive lt3957/lt3958 40v/100v flyback, boost converters monolithic with integrated 5a/3.3a switch lt1725 20v isolated flyback controller controller with load compensation circuitry lt1737 20v isolated flyback controller no opto-isolator or third winding required, up to 50w output ltc ? 3803/ltc3803-3 ltc3803-5 200khz/300khz flyback dc/dc controllers v in and v out limited only by external components ltc3805/ltc3805-5 adjustable frequency flyback controllers v in and v out limited only by external components

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